| Title: | algorithms for analog vlsi 2d stack generation and block merging |
| Author: | Liu R
; Dong SQ
; Hong XL
; Long D
; Gu J
|
| Conference Name: | IEEE International Symposium on Circuits and Systems
|
| Conference Date: | MAY 25-28,
|
| Issued Date: | 2003
|
| Conference Place: | BANGKOK, THAILAND
|
| Keyword: | 2D stack generation
; analog VLSI design algorithm
; bi-axial symmetry
; block merging
; dummy transistor insertion
; mismatch minimization
; parasitic control
; symmetric Eulerian graph
; symmetric Eulerian trail
; VLSI
; analogue integrated circuits
; circuit CAD
|
| Publisher: | PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL IV - DIGITAL SIGNAL PROCESSING-COMPUTER AIDED NETWORK DESIGN-ADVANCED TECHNOLOGY
|
| Publish Place: | 345 E 47TH ST, NEW YORK, NY 10017 USA
|
| Indexed Type: | istp
; ieee
|
| ISBN: | 0-7803-7761-3
|
| Department: | Chinese Acad Sci, Inst Software, Beijing 100080, Peoples R China.
|
| Sponsorship: | IEEE Circuits & Syst Soc, Mahanakorn Univ Technol
|
| English Abstract: | In analog VLSI design, 2-axial symmetry stack and block merging are critical for mismatch minimization and parasitic control. In this paper, algorithms for analog VLSI 2-axial symmetry stack and block merging are described. We get several theo |
| Language: | 英语
|
| Content Type: | 会议论文
|
| URI: | http://ir.iscas.ac.cn/handle/311060/13200
|
| Appears in Collections: | 软件所图书馆_会议论文
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| File Name/ File Size |
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| 01206244.pdf（430KB） | -- | -- | 限制开放 | -- | 联系获取全文 |
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| Recommended Citation: | |
Liu R,Dong SQ,Hong XL,et al. algorithms for analog vlsi 2d stack generation and block merging[C]. 见:IEEE International Symposium on Circuits and Systems. BANGKOK, THAILAND. MAY 25-28,.
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