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Title:
two-dimensional common-centroid stack generation algorithms for analog vlsi
Author: Liu R ; Dong SQ ; Hong XL ; Long D ; Gu J
Conference Name: 5th International Conference on ASIC
Conference Date: OCT 21-24,
Issued Date: 2003
Conference Place: Beijing, PEOPLES R CHINA
Keyword: analog VLSI design ; mismatch minimization ; parasitic control ; stack generation algorithm ; symmetric Eulerian graph ; symmetric Eulerian trail ; transistor insertion ; two dimensional common centroid stacks ; two dimensional symmetry ; very large scale integrat
Publisher: 2003 5TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS
Publish Place: 345 E 47TH ST, NEW YORK, NY 10017 USA
Indexed Type: istp ; ieee
ISBN: 0-7803-7889-X
Department: Chinese Acad Sci, Inst Software, Beijing 100080, Peoples R China.
Sponsorship: IEEE, Beijing Sect, CIE, IEE, Beijing Branch, IEEE CAS
English Abstract: In analog VLSI design, two-dimensional common-centroid stacks, in which devices are two-dimensional symmetry and have a common-centroid, are critical for mismatch minimization and parasitic control. However it is difficult to Construct due to
Language: 英语
Content Type: 会议论文
URI: http://ir.iscas.ac.cn/handle/311060/13214
Appears in Collections:软件所图书馆_会议论文

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Recommended Citation:
Liu R,Dong SQ,Hong XL,et al. two-dimensional common-centroid stack generation algorithms for analog vlsi[C]. 见:5th International Conference on ASIC. Beijing, PEOPLES R CHINA. OCT 21-24,.
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