Title: hybrid algorithms for hardware/software partitioning and scheduling on reconfigurable devices
Author: Liu Peng
; Wu Jigang
; Wang Yongji
Keyword: Computer hardware
; Field programmable gate arrays (FPGA)
; Hardware
; Multitasking
; Response time (computer systems)
; Scheduling
; Scheduling algorithms
; Simulated annealing
; Tabu search
Source: Mathematical and Computer Modelling
Issued Date: 2012
Pages: - Indexed Type: EI
Department: (1) School of Computer Science and Software Engineering Tianjin Polytechnic University Tianjin 300387 China; (2) State Key Laboratory of Computer Science Institute of Software Chinese Academy of Sciences Beijing 100190 China
Abstract: Hardware/software (HW/SW) partitioning and scheduling are essential to embedded systems. In this paper, a hybrid algorithm derived from Tabu Search (TS) and Simulated Annealing (SA) is proposed for solving the HW/SW partitioning problem. The annealing procedure of SA is employed to accelerate the updating of Tabu tables for task scheduling, and the virtual hardware resource is also set to implement the customized TS. The Earliest-Deadline-First (EDF) strategy is introduced to describe the reconfiguration of FPGA. Moreover, an algorithm combining the Breadth-First-Search (BFS) with Depth-First-Search (DFS) is proposed for HW/SW task scheduling to fit the features of reconfigurable systems. Experimental results show that the improvement over the latest efficient combinatorial algorithm is up to 50%. The proposed virtual hardware expanding technique makes the performance increase up to 97.51% on random graphs. The improvement on task scheduling is by 50% in comparison to popular algorithms cited in this paper. © 2012 Elsevier Ltd. All rights reserved. English Abstract: Hardware/software (HW/SW) partitioning and scheduling are essential to embedded systems. In this paper, a hybrid algorithm derived from Tabu Search (TS) and Simulated Annealing (SA) is proposed for solving the HW/SW partitioning problem. The annealing procedure of SA is employed to accelerate the updating of Tabu tables for task scheduling, and the virtual hardware resource is also set to implement the customized TS. The Earliest-Deadline-First (EDF) strategy is introduced to describe the reconfiguration of FPGA. Moreover, an algorithm combining the Breadth-First-Search (BFS) with Depth-First-Search (DFS) is proposed for HW/SW task scheduling to fit the features of reconfigurable systems. Experimental results show that the improvement over the latest efficient combinatorial algorithm is up to 50%. The proposed virtual hardware expanding technique makes the performance increase up to 97.51% on random graphs. The improvement on task scheduling is by 50% in comparison to popular algorithms cited in this paper. © 2012 Elsevier Ltd. All rights reserved. Language: 英语
WOS ID: WOS:000320601000042
Citation statistics:
Content Type: 期刊论文
URI: http://ir.iscas.ac.cn/handle/311060/15156
Appears in Collections: 软件所图书馆_期刊论文
There are no files associated with this item.
Recommended Citation:
Liu Peng,Wu Jigang,Wang Yongji. hybrid algorithms for hardware/software partitioning and scheduling on reconfigurable devices[J]. Mathematical and Computer Modelling,2012-01-01:-.
