Title: | fast verification of memory consistency for chip multi-processor |
Author: | Zheng Lv
; Chen Hao
; Chen Feng
; Yi Lv
|
Source: | Proceedings - 2011 7th International Conference on Computational Intelligence and Security, CIS 2011
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Conference Name: | 2011 7th International Conference on Computational Intelligence and Security, CIS 2011
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Conference Date: | December 3, 2011 - December 4, 2011
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Issued Date: | 2011
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Conference Place: | Sanya, Hainan, China
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Keyword: | Algorithms
; Artificial intelligence
; Computational complexity
; Program processors
; Real time systems
; Software testing
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Indexed Type: | EI
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ISBN: | 9780769545844
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Department: | (1) School of Information Science and Technology Northwest University China; (2) Institute of Software Chinese Academy of Sciences China; (3) China Institute of Industrial Relations China; (4) State Key Laboratory of Computer Science Institute of Software Chinese Academy of Sciences China
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Sponsorship: | Xidian University; HIC; Beijing Normal University; Guangdong University of Technology
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Abstract: | Verifying the execution of a test program against the memory consistency model is known to be NP-hard. Because of lacking extra observability, verifying the memory consistency model in post-silicon stage is even harder than in pre-silicon stage. In this paper, by identifying the pending windows of microprocessor and introducing the resultant time order restrictions, we propose a low time complexity algorithm for checking end-to-end correctness on real systems. Our MOTEC tool, which implements the above algorithm, has been successfully detected several injected bugs in a CMP emulation environment. It is also worth noting that MOTEC is general enough to support many CMP systems with trivial modifications. © 2011 IEEE. |
English Abstract: | Verifying the execution of a test program against the memory consistency model is known to be NP-hard. Because of lacking extra observability, verifying the memory consistency model in post-silicon stage is even harder than in pre-silicon stage. In this paper, by identifying the pending windows of microprocessor and introducing the resultant time order restrictions, we propose a low time complexity algorithm for checking end-to-end correctness on real systems. Our MOTEC tool, which implements the above algorithm, has been successfully detected several injected bugs in a CMP emulation environment. It is also worth noting that MOTEC is general enough to support many CMP systems with trivial modifications. © 2011 IEEE. |
Language: | 英语
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Content Type: | 会议论文
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URI: | http://ir.iscas.ac.cn/handle/311060/16296
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Appears in Collections: | 软件所图书馆_会议论文
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Recommended Citation: |
Zheng Lv,Chen Hao,Chen Feng,et al. fast verification of memory consistency for chip multi-processor[C]. 见:2011 7th International Conference on Computational Intelligence and Security, CIS 2011. Sanya, Hainan, China. December 3, 2011 - December 4, 2011.
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