module placement with boundary constraints using o-tree representation

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	module placement with boundary constraints using o-tree representation
	Liu R; Hong XL; Dong SQ; Cai YC; Gu J; Cheng CK
	2002
会议名称	IEEE International Symposium on Circuits and Systems
页码	871-874
会议日期	MAY 26-29,
会议地点	PHOENIX, AZ
收录类别	istp ; ieee
出版地	345 E 47TH ST, NEW YORK, NY 10017 USA
出版者	2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, PROCEEDINGS
ISBN	0-7803-7448-7
部门归属	Chinese Acad Sci, Inst Software, Beijing, Peoples R China.
摘要	The O-tree representation needs linear computation effort to generate a corresponding layout, and exhibits a smaller upper bound of possible configurations. This paper addresses the problem of handling boundary constraints in the context of O-
关键词	I/o Pad Connection O-tree Representation Vlsi Physical Design Boundary Constraints Chip Boundary Placement Layout Generation Linear Computation Effort Module Placement Polynomial Methods Simulated Annealing Based Algorithm Circuit Optimisation
主办者	IEEE, IEEE Circuits & Syst Soc
语种	英语
内容类型	会议论文
URI标识	http://ir.iscas.ac.cn/handle/311060/13390
专题	中国科学院软件研究所
推荐引用方式 GB/T 7714	Liu R,Hong XL,Dong SQ,et al. module placement with boundary constraints using o-tree representation[C]. 345 E 47TH ST, NEW YORK, NY 10017 USA:2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, PROCEEDINGS,2002:871-874.