ISCAS OpenIR
vlsi/pcb placement with predefined coordinate alignment constraint based on sequence pair
Liu R; Hong XL; Dong SQ; Cai YC; Gu J
2001
Conference Name4th International Conference on ASIC
Pages167-170
Conference DateOCT 23-25,
Conference PlaceSHANGHAI, PEOPLES R CHINA
Indexed Typeistp ; ieee
Publish Place345 E 47TH ST, NEW YORK, NY 10017 USA
Publisher2001 4TH INTERNATIONAL CONFERENCE ON ASIC PROCEEDINGS
ISBN0-7803-6677-8
DepartmentChinese Acad Sci, Inst Software, Beijing, Peoples R China.
English AbstractIn the system on a chip, some cells should be placed along a predefined coordinate within a relative small region. This constraint comes from the requirement that the data should be ready on the common bus on the same time. In this paper, we s
KeywordPcb Placement Vlsi Placement Common Bus Module Placement Polynomial Time Algorithm Predefined Coordinate Alignment Constraint Sequence Pair System-on-a-chip Vlsi Circuit Layout Cad Integrated Circuit Layout Printed Circuit Layout
SponsorshipChinese Inst Electr, IEEE Beijing Sect, Natl Nat Sci Fdn China, Shanghai Municipal Sci & Technol Commiss
Language英语
Content Type会议论文
URIhttp://ir.iscas.ac.cn/handle/311060/13446
Collection中国科学院软件研究所
Recommended Citation
GB/T 7714
Liu R,Hong XL,Dong SQ,et al. vlsi/pcb placement with predefined coordinate alignment constraint based on sequence pair[C]. 345 E 47TH ST, NEW YORK, NY 10017 USA:2001 4TH INTERNATIONAL CONFERENCE ON ASIC PROCEEDINGS,2001:167-170.
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