Institutional Repository
| Synchronous circuit verification by symbolic simulation: an illustration | |
| Derek L. Beatty; Randal E. Bryant; Carl-Johan H. Seger | |
| 1990 | |
| Conference Name | Proceedings of the sixth MIT conference on Advanced research in VLSI |
| Conference Date | 1990 |
| Conference Place | Boston, Massachusetts, United States |
| Indexed Type | 其他 |
| Cooperation Status | 其它 |
| Language | 中文 |
| Content Type | 会议论文 |
| URI | http://ir.iscas.ac.cn/handle/311060/1355 |
| Collection | 中国科学院软件研究所 |
| Recommended Citation GB/T 7714 | Derek L. Beatty,Randal E. Bryant,Carl-Johan H. Seger. Synchronous circuit verification by symbolic simulation: an illustration[C],1990. |
| Files in This Item: | ||||||
| File Name/Size | DocType | Version | Access | License | ||
| bj01148816.pdf（674KB） | 开放获取 | License | Application Full Text | |||
Items in the repository are protected by copyright, with all rights reserved, unless otherwise indicated.
Edit Comment