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| efficient deadlock-free fault-tolerant routing in prdt network for networks-on-chip designs | |
| Duan Xinming; Wu Jigang | |
| 2012 | |
| Source | Journal of Computational Information Systems
 |
| ISSN | 1553-9105 |
| Volume | 8Issue:16Pages:6963-6970 |
| English Abstract | Fault tolerance is one of the most dominant issues for NoC systems. PRDT-based interconnection network is constructed by recursively overlaying 2-D diagonal meshes (torus). A PRDT network with two ranks has been proposed for NoC designs. In this paper, we present and compare two deadlockfree fault tolerant routing algorithms for PRDT topology NoC. The first algorithm is an extension of planar adaptive routing algorithm. It routes messages in PRDT networks under individual failures. The second algorithm employs a hierarchical fault model which converts a fault region into a rectangular in shape on different rank of PRDT structure. The proposed hierarchical fault tolerant routing algorithm routes messages under multiple failures. It only uses three extra virtual channels. As a result, a routing message can certainly find a path between any pairs of non-faulty nodes, if the network does not break by fault regions. The result of simulation shows that both of the proposed algorithms are of feasibility of gracefully degraded operation. The hierarchical fault tolerant routing algorithm provides superior performance as compared to the planar fault tolerant routing algorithm in all traffic cases. © 2012 Binary Information Press.; Fault tolerance is one of the most dominant issues for NoC systems. PRDT-based interconnection network is constructed by recursively overlaying 2-D diagonal meshes (torus). A PRDT network with two ranks has been proposed for NoC designs. In this paper, we present and compare two deadlockfree fault tolerant routing algorithms for PRDT topology NoC. The first algorithm is an extension of planar adaptive routing algorithm. It routes messages in PRDT networks under individual failures. The second algorithm employs a hierarchical fault model which converts a fault region into a rectangular in shape on different rank of PRDT structure. The proposed hierarchical fault tolerant routing algorithm routes messages under multiple failures. It only uses three extra virtual channels. As a result, a routing message can certainly find a path between any pairs of non-faulty nodes, if the network does not break by fault regions. The result of simulation shows that both of the proposed algorithms are of feasibility of gracefully degraded operation. The hierarchical fault tolerant routing algorithm provides superior performance as compared to the planar fault tolerant routing algorithm in all traffic cases. © 2012 Binary Information Press. |
| Indexed Type | EI |
| Keyword | Algorithms Fault Tolerance Routing Algorithms |
| Department | (1) School of Computer Science and Software Tianjin Polytechnic University Tianjin 300387 China; (2) State Key Laboratory of Computer Science Institute of Software Chinese Academy of Sciences Beijing 100190 China |
| Language | 英语 |
| Content Type | 期刊论文 |
| URI | http://ir.iscas.ac.cn/handle/311060/15024 |
| Collection | 中国科学院软件研究所 |
| Recommended Citation GB/T 7714 | Duan Xinming,Wu Jigang. efficient deadlock-free fault-tolerant routing in prdt network for networks-on-chip designs[J]. Journal of Computational Information Systems,2012,8(16):6963-6970. |
| APA | Duan Xinming,&Wu Jigang.(2012).efficient deadlock-free fault-tolerant routing in prdt network for networks-on-chip designs.Journal of Computational Information Systems,8(16),6963-6970. |
| MLA | Duan Xinming,et al."efficient deadlock-free fault-tolerant routing in prdt network for networks-on-chip designs".Journal of Computational Information Systems 8.16(2012):6963-6970. |
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