ISCAS OpenIR
StreamScan: Fast scan algorithms for GPUs without global barrier synchronization
Yan, Shengen (1); Long, Guoping (1); Zhang, Yunquan (1); Yan, S.(yanshengen@gmail.com)
2013
Conference Name18th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 2013
Pages229-238
Conference DateFebruary 23, 2013 - February 27, 2013
Conference PlaceShenzhen, China
Indexed TypeSCI ; EI
Publish PlaceAssociation for Computing Machinery, General Post Office, P.O. Box 30777, NY 10087-0777, United States
ISSN0362-1340
ISBN9781450319225
Department(1) Lab. of Parallel Software and Computational Science, Institute of Software, Chinese Academy of Sciences, Beijing, China; (2) State Key Laboratory of Computing Science, Chinese Academy of Sciences, Beijing, China; (3) Graduate University, Chinese Academy of Sciences, Beijing, China
English AbstractScan (also known as prefix sum) is a very useful primitive for various important parallel algorithms, such as sort, BFS, SpMV, compaction and so on. Current state of the art of GPU based scan implementation consists of three consecutive Reduce-Scan-Scan phases. This approach requires at least two global barriers and 3N (N is the problem size) global memory accesses. In this paper we propose StreamScan, a novel approach to implement scan on GPUs with only one computation phase. The main idea is to restrict synchronization to only adjacent workgroups, and thereby eliminating global barrier synchronization completely. The new approach requires only 2N global memory accesses and just one kernel invocation. On top of this we propose two important op-timizations to further boost performance speedups, namely thread grouping to eliminate unnecessary local barriers, and register optimization to expand the on chip problem size. We designed an auto-tuning framework to search the parameter space automatically to generate highly optimized codes for both AMD and Nvidia GPUs. We implemented our technique with OpenCL. Compared with previous fast scan implementations, experimental results not only show promising performance speedups, but also reveal dramatic different optimization tradeoffs between Nvidia and AMD GPU platforms. © 2013 ACM.; Scan (also known as prefix sum) is a very useful primitive for various important parallel algorithms, such as sort, BFS, SpMV, compaction and so on. Current state of the art of GPU based scan implementation consists of three consecutive Reduce-Scan-Scan phases. This approach requires at least two global barriers and 3N (N is the problem size) global memory accesses. In this paper we propose StreamScan, a novel approach to implement scan on GPUs with only one computation phase. The main idea is to restrict synchronization to only adjacent workgroups, and thereby eliminating global barrier synchronization completely. The new approach requires only 2N global memory accesses and just one kernel invocation. On top of this we propose two important op-timizations to further boost performance speedups, namely thread grouping to eliminate unnecessary local barriers, and register optimization to expand the on chip problem size. We designed an auto-tuning framework to search the parameter space automatically to generate highly optimized codes for both AMD and Nvidia GPUs. We implemented our technique with OpenCL. Compared with previous fast scan implementations, experimental results not only show promising performance speedups, but also reveal dramatic different optimization tradeoffs between Nvidia and AMD GPU platforms. © 2013 ACM.
KeywordScan Prefix-sum Opencl Cuda Gpu Parallel Algorithms
Language英语
WOS IDWOS:000324158900022
Citation statistics
Cited Times:55[WOS]   [WOS Record]     [Related Records in WOS]
Content Type会议论文
URIhttp://ir.iscas.ac.cn/handle/311060/16554
Collection中国科学院软件研究所
Corresponding AuthorYan, S.(yanshengen@gmail.com)
Recommended Citation
GB/T 7714
Yan, Shengen ,Long, Guoping ,Zhang, Yunquan ,et al. StreamScan: Fast scan algorithms for GPUs without global barrier synchronization[C]. Association for Computing Machinery, General Post Office, P.O. Box 30777, NY 10087-0777, United States,2013:229-238.
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