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| An executable semantics of SystemC transaction level models and its applications with VERDS | |
| Zeng, Naiju (1); Zhang, W. (1); Zeng, Naiju | |
| 2014 | |
| Conference Name | 2014 19th International Conference on Engineering of Complex Computer Systems, ICECCS 2014 |
| Pages | 198-201 |
| Conference Date | August 4, 2014 - August 7, 2014 |
| Conference Place | Tianjin, China |
| Indexed Type | EI |
| Publish Place | Institute of Electrical and Electronics Engineers Inc. |
| ISBN | 9781479954827 |
| Department | (1) State Key Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences, Beijing, China; (2) University of Chinese Academy of Sciences, Beijing, China |
| English Abstract | Transaction level modeling (TLM) is a high-level approach to modeling digital systems where details of communication are separated from the details of computation. In SystemC transaction level models, modules communicate through function calls provided by channels, which include primitive channels and hierarchical channels. This work extends the semantics of simple SystemC models in previous work to support the key concepts of SystemC transaction level models and presents a tool to transform SystemC source codes in TLM-1.0 to transition systems for the purpose of verification on symbolic model checker VERDS. Our approach is demonstrated through a case study of an abstract bus implemented in TLM-1.0 of SystemC.; Transaction level modeling (TLM) is a high-level approach to modeling digital systems where details of communication are separated from the details of computation. In SystemC transaction level models, modules communicate through function calls provided by channels, which include primitive channels and hierarchical channels. This work extends the semantics of simple SystemC models in previous work to support the key concepts of SystemC transaction level models and presents a tool to transform SystemC source codes in TLM-1.0 to transition systems for the purpose of verification on symbolic model checker VERDS. Our approach is demonstrated through a case study of an abstract bus implemented in TLM-1.0 of SystemC. |
| Language | 英语 |
| Content Type | 会议论文 |
| URI | http://ir.iscas.ac.cn/handle/311060/16625 |
| Collection | 中国科学院软件研究所 |
| Corresponding Author | Zeng, Naiju |
| Recommended Citation GB/T 7714 | Zeng, Naiju ,Zhang, W. ,Zeng, Naiju. An executable semantics of SystemC transaction level models and its applications with VERDS[C]. Institute of Electrical and Electronics Engineers Inc.,2014:198-201. |
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